View LT3580_4279423.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LT3580 Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization FEATURES
n n n n n n n n n n n
DESCRIPTION
The LT(R)3580 is a PWM DC/DC converter containing an internal 2A, 42V switch. The LT3580 can be configured as either a boost, SEPIC or inverting converter. Capable of generating 12V at 550mA or -12V at 350mA from a 5V input, the LT3580 is ideal for many local power supply designs. The LT3580 has an adjustable oscillator, set by a resistor from the RT pin to ground. Additionally, the LT3580 can be synchronized to an external clock. The free running or synchronized switching frequency range of the part can be set between 200kHz and 2.5MHz. The LT3580 also features innovative SHDN pin circuitry that allows for slowly varying input signals and an adjustable undervoltage lockout function. Additional features such as frequency foldback and softstart are integrated. The LT3580 is available in tiny 3mm x 3mm 8-lead DFN and 8-lead MSOP packages.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
2A Internal Power Switch Adjustable Switching Frequency Single Feedback Resistor Sets VOUT Synchronizable to External Clock High Gain SHDN Pin Accepts Slowly Varying Input Signals Wide Input Voltage Range: 2.5V to 32V Low VCESAT Switch: 300mV at 1.5A (Typical) Integrated Soft-Start Function Easily Configurable as a Boost or Inverting Converter User Configurable Undervoltage Lockout (UVLO) Tiny 8-Lead 3mm x 3mm DFN and 8-Lead MSOP Packages
APPLICATIONS
n n n n n
VFD Bias Supplies TFT-LCD Bias Supplies GPS Receivers DSL Modems Local Power Supply
TYPICAL APPLICATION
1.2MHz, 5V to 12V Boost Converter Achieves over 88% Efficiency
VIN 5V VIN SHDN LT3580 RT SYNC 2.2F 75k SS 0.1F FB VC 10k 1nF
3580 TA01
Efficiency and Power Loss
95 90 1000 85 POWER LOSS (mW) EFFICIENCY (%) 80 75 600 70 65 60 200 55 50 0 100 200 300 400 LOAD CURRENT (mA) 500 600 0 400 800 1200
4.2H
VOUT 12V 550mA SW GND 130k 10F
3580 TA01b
3580fc
1
LT3580 ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN Voltage ................................................. -0.3V to 32V SW Voltage ................................................ -0.4V to 42V RT Voltage.................................................... -0.3V to 5V SS and FB Voltage..................................... -0.3V to 2.5V VC Voltage ................................................... -0.3V to 2V SHDN Voltage ............................................ -0.3V to 32V
SYNC Voltage ............................................ -0.3V to 5.5V Operating Junction Temperature Range LT3580E (Notes 2, 5) .........................-40C to 125C LT3580I (Notes 2, 5) ..........................-40C to 125C Storage Temperature Range...................-65C to 150C
PIN CONFIGURATION
TOP VIEW TOP VIEW FB 1 VC 2 VIN 3 SW 4 9 8 7 6 5 SYNC SS RT SHDN FB VC VIN SW 1 2 3 4 8 7 6 5 SYNC SS RT SHDN
9
MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125C, JA = 35C/W TO 40C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LT3580EDD#PBF LT3580IDD#PBF LT3580EMS8E#PBF LT3580IMS8E#PBF TAPE AND REEL LT3580EDD#TRPBF LT3580IDD#TRPBF LT3580EMS8E#TRPBF LT3580IMS8E#TRPBF PART MARKING* LCXY LCXY LTDCJ LTDCJ PACKAGE DESCRIPTION 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead Plastic MSOP 8-Lead Plastic MSOP TEMPERATURE RANGE -40C to 125C -40C to 125C -40C to 125C -40C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3580fc
2
LT3580 ELECTRICAL CHARACTERISTICS
PARAMETER Operating Voltage Range Positive Feedback Voltage Negative Feedback Voltage Positive FB Pin Bias Current Negative FB Pin Bias Current Error Amplifier Transconductance Error Amplifier Voltage Gain Quiescent Current Quiescent Current in Shutdown Reference Line Regulation Switching Frequency, fOSC Switching Frequency in Foldback Switching Frequency Set Range SYNC High Level for Synchronization SYNC Low Level for Synchronization SYNC Clock Pulse Duty Cycle Recommended Minimum SYNC Ratio fSYNC/fOSC Minimum Off-Time Minimum On-Time Switch Current Limit Switch VCESAT Switch Leakage Current Soft-Start Charging Current SHDN Minimum Input Voltage High SHDN Input Voltage Low SHDN Pin Bias Current Minimum Duty Cycle (Note 3) Maximum Duty Cycle (Notes 3, 4) ISW = 1.5A VSW = 5V VSS = 0.5V Active Mode, SHDN Rising Active Mode, SHDN Falling Shutdown Mode VSHDN = 3V VSHDN = 1.3V VSHDN = 0V
l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 5V, VSHDN = VIN unless otherwise noted. (Note 2)
CONDITIONS
l l l l l
MIN 2.5 1.195 0 81 81
TYP 1.215 5 83.3 83.3 230 70
MAX 32 1.230 12 85 85.5
UNITS V V mV A A mhos V/V
V FB = Positive Feedback Voltage, Current Into Pin V FB = Negative Feedback Voltage, Current Out of Pin
VSHDN = 2.5V, Not Switching VSHDN = 0V 2.5V VIN 32V RT = 45.3k RT = 464k Compared to Normal fOSC SYNCing or Free Running
l l l l l
1 0 0.01 1.8 180 200 1.3 2 200 1/4
1.5 1 0.05 2.2 220 2500 0.4
mA A %/V MHz kHz Ratio kHz V V % nS nS
VSYNC = 0V to 2V
35 3/4 60 100 2.2 1.6 2.5 1.9 300 0.01 4 1.27 1.24 6 1.32 1.29 40 11.6 0
65
2.8 2.6 1 8 1.38 1.33 0.3 60 13.4 0.1
A A mV A A V V V A A A
9.7
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3580E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3580I is guaranteed over the full -40C to 125C operating junction temperature range.
Note 3: Current limit guaranteed by design and/or correlation to static test. Note 4: Current limit measured at equivalent switching frequency of 2.5MHz. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
3580fc
3
LT3580 TYPICAL PERFORMANCE CHARACTERISTICS
Switch Current Limit at 1MHz
400 2.5 SWITCH CURRENT LIMIT (A) SATURATION VOLTAGE (mV) 2.0 1.5 1.0 0.5 50 0 10 20 30 40 50 60 70 DUTY CYCLE (%) 80 90 0 0 0 1 0.5 1.5 SWITCH CURRENT (A) 2
3580 G02
TA = 25C unless otherwise specified Switch Current Limit at Minimum Duty Cycle
2.5 SWITCH CURRENT (A) 2.0 1.5 1.0 0.5
Switch Saturation Voltage
350 300 250 200 150 100
0
200
400 600 800 SS VOLTAGE (mV)
1000
1200
3580 G01
3580 G03
Switch Current Limit at Minimum Duty Cycle
3.0 2.5 FB VOLTAGE (V) 2.0 1.5 1.0 0.5 0 -50 1.24
Positive Feedback Voltage
VOUT 50mV/DIV AC COUPLED
Switching Waveforms for Figure 14 Circuit
SWITCH CURRENT LIMIT (A)
1.23
1.22
VSW 10V/DIV
1.21
1.20
IL 0.5A/DIV -25 50 25 0 75 TEMPERATURE (C) 100 125 200ns/DIV
3580 G06
0 50 TEMPERATURE (C)
100
3580 G04
1.19 -50
3580 G05
Oscillator Frequency
NORMALIZED OSCILLATOR FREQUENCY (F/FNOM) 2.7 2.5 2.3 FREQUENCY (MHz) 2.1 1.9 1.7 1.5 1.3 1.1 -50 RT = 75k 50 0 TEMPERATURE (C) 100
3580 G07
Oscillator Frequency During Soft-Start
1 TA = 35C TA = 100C TA = 25C 2.40 2.38 2.36 VIN VOLTAGE (V) 2.34
Internal UVLO
RT = 35.7k
2.32 2.30 2.28 2.26
1/2 1/3 1/4 INVERTING CONFIGURATIONS 0 0 0.2 0.4 0.6 0.8 FB VOLTAGE (V) 1.0 1.2
3580 G08
2.24 BOOSTING CONFIGURATIONS 2.22 2.20 -50 50 0 TEMPERATURE (C) 100
3580 G09
3580fc
4
LT3580 TYPICAL PERFORMANCE CHARACTERISTICS
SHDN Pin Current
30 25 SHDN PIN CURRENT (A) SHDN PIN CURRENT (A) 20 15 10 5 100C 0 0 0.5 1 1.5 SHDN VOLTAGE (V) 2
3580 G10
TA = 25C unless otherwise specified Active/Lockout Threshold
1.40 1.38
SHDN Pin Current
300 -50C 250 200 150 100 50 0 0 5 20 15 25 10 SHDN VOLTAGE (V) 30
3580 G11
20C SHDN VOLTAGE (V) 100C
1.36 1.34 1.32 1.30 1.28 1.26 1.24 1.22 SHDN FALLING SHDN RISING
-50C 20C
1.20 -50
50 0 TEMPERATURE (C)
100
3580 G12
PIN FUNCTIONS
FB (Pin 1): Positive and Negative Feedback Pin. For a boost or inverting converter, tie a resistor from the FB pin to VOUT according to the following equations: RFB = RFB = RT (Pin 6): Timing Resistor Pin. Adjusts the switching frequency. Place a resistor from this pin to ground to set the frequency to a fixed free running level. Do not float this pin. SS (Pin 7): Soft-Start Pin. Place a soft-start capacitor here. Upon start-up, the SS pin will be charged by a (nominally) 275k resistor to about 2.2V. SYNC (Pin 8): To synchronize the switching frequency to an outside clock, simply drive this pin with a clock. The high voltage level of the clock needs to exceed 1.3V, and the low level should be less 0.4V. Drive this pin to less than 0.4V to revert to the internal free running clock. See the Applications Information section for more information. Exposed Pad (Pin 9): Ground. Must be soldered directly to local ground plane.
( VOUT
1.215)
(
83.3 * 10 6 VOUT + 5mV 83.3 * 10
6
; Boost or SEPIC Converter
) ; Inverting Converter
VC (Pin 2): Error Amplifier Output Pin. Tie external compensation network to this pin. VIN (Pin 3): Input Supply Pin. Must be locally bypassed. SW (Pin 4): Switch Pin. This is the collector of the internal NPN Power switch. Minimize the metal trace area connected to this pin to minimize EMI. SHDN (Pin 5): Shutdown Pin. In conjunction with the UVLO (undervoltage lockout) circuit, this pin is used to enable/disable the chip and restart the soft-start sequence. Drive below 1.24V to disable the chip. Drive above 1.38V to activate chip and restart the soft-start sequence. Do not float this pin.
3580fc
5
LT3580 BLOCK DIAGRAM
RC CSS SHDN 5 1.3V 7 2 VC L1 275k UVLO SR2 R Q VIN 3 S 1.215V REFERENCE Q2 SOFTSTART VC ILIMIT COMPARATOR SW 4 D1 VOUT CC VIN CIN
- +
SS
DISCHARGE DETECT
-
A3 R
SR1 DRIVER S Q Q1 C1
+ +
A1
+
RAMP GENERATOR FREQUENCY FOLDBACK /N ADJUSTABLE OSCILLATOR A4 0.01
RFB
14.6k
-
FB 1 14.6k
-
GND 9
+
A2
-
SYNC BLOCK SYNC 8 6 RT RT
3580 BD
3580fc
6
LT3580 OPERATION
The LT3580 uses a constant-frequency, current mode control scheme to provide excellent line and load regulation. Refer to the Block Diagram which shows the LT3580 in a boost configuration. At the start of each oscillator cycle, the SR latch (SR1) is set, which turns on the power switch, Q1. The switch current flows through the internal current sense resistor generating a voltage proportional to the switch current. This voltage (amplified by A4) is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A3. When this voltage exceeds the level at the negative input of A3, the SR latch is reset, turning off the power switch. The level at the negative input of A3 (VC pin) is set by the error amplifier A1 (or A2) and is simply an amplified version of the difference between the feedback voltage (FB pin) and the reference voltage (1.215V or 5mV depending on the configuration). In this manner, the error amplifier sets the correct peak current level to keep the output in regulation. The LT3580 has a novel FB pin architecture that can be used for either boost or inverting configurations. When configured as a boost converter, the FB pin is pulled up to the internal bias voltage of 1.215V by the RFB resistor connected from VOUT to FB. Comparator A2 becomes inactive and comparator A1 performs the inverting amplification from FB to VC. When the LT3580 is in an inverting
VIN > VOUT OR VIN = VOUT OR VIN < VOUT SHUTDOWN L1 C2 D1
configuration, the FB pin is pulled down to 5mV by the RFB resistor connected from VOUT to FB. Comparator A1 becomes inactive and comparator A2 performs the noninverting amplification from FB to VC. SEPIC Topology The LT3580 can be configured as a SEPIC (single-ended primary inductance converter). This topology allows for the input to be higher, equal, or lower then the desired output voltage. Output disconnect is inherently built into the SEPIC topology, meaning no DC path exists between the input and output. This is useful for applications requiring the output to be disconnected from the input source when the circuit is in shutdown. Inverting Topology The LT3580 can also work in a dual inductor inverting topology. The part's unique feedback pin allows for the inverting topology to be built by simply changing the connection of external components. This solution results in very low output voltage ripple due to inductor L2 in series with the output. Abrupt changes in output capacitor current are eliminated because the output inductor delivers current to the output during both the off-time and the on-time of the LT3580 switch.
*
SW
L1 VOUT VIN
*
SW
C2
*
D1
L2 VOUT
*
+
C1
VIN LT3580 SHDN RT SYNC RT
L2 R1
+
C1 SHUTDOWN
VIN LT3580 SHDN RT
FB GND VC SS CSS RC
FB GND VC SS CSS
R1
+
C3
SYNC RT
+
RC CC
3580 F02
C3
CC
3580 F01
Figure 1. SEPIC Topology Allows for the Input to Span the Output Voltage. Coupled or uncoupled inductors can be used. Follow noted phasing if coupled.
Figure 2. Dual Inductor Inverting Topology Results in Low Output Ripple. Coupled or uncoupled inductors can be used. Follow noted phasing if coupled.
3580fc
7
LT3580 OPERATION
Start-Up Operation Several functions are provided to enable a very clean start-up for the LT3580. * First, the SHDN pin voltage is monitored by an internal voltage reference to give a precise turn-on voltage level. An external resistor (or resistor divider) can be connected from the input power supply to the SHDN pin to provide a user-programmable undervoltage lockout function. * Second, the soft-start circuitry provides for a gradual ramp-up of the switch current. When the part is brought out of shutdown, the external SS capacitor is first discharged (providing protection against SHDN pin glitches and slow ramping), then an integrated 275k resistor pulls the SS pin up to ~2.2V. By connecting an external capacitor to the SS pin, the voltage ramp rate on the pin can be set. Typical values for the soft-start capacitor range from 100nF to 1F. * Finally, the frequency foldback circuit reduces the switching frequency when the FB pin is in a nominal range of 350mV to 900mV. This feature reduces the minimum duty cycle that the part can achieve thus allowing better control of the switch current during start-up. When the FB voltage is pulled outside of this range, the switching frequency returns to normal. Current Limit and Thermal Shutdown Operation The LT3580 has a current limit circuit not shown in the Block Diagram. The switch current is consistently monitored and not allowed to exceed the maximum switch current at a given duty cycle (see the Electrical Characteristics table). If the switch current reaches this value, the SR latch (SR1) is reset regardless of the state of the comparator (A1/A2). Also not shown in the Block Diagram is the thermal shutdown circuit. If the temperature of the part exceeds approximately 165C, the SR2 latch is set regardless of the state of the comparator (A1/A2). A full soft-start cycle will then be initiated. The current limit and thermal shutdown circuits protect the power switch as well as the external components connected to the LT3580.
3580fc
8
LT3580 APPLICATIONS INFORMATION
Setting Output Voltage The output voltage is set by connecting a resistor (RFB) from VOUT to the FB pin. RFB is determined from the following equation: |V V| RFB = OUT FB 83.3A where VFB is 1.215V (typical) for non-inverting topologies (i.e., boost and SEPIC regulators) and 5mV (typical) for inverting topologies (see the Electrical Characteristics). Power Switch Duty Cycle In order to maintain loop stability and deliver adequate current to the load, the power NPN (Q1 in the Block Diagram) cannot remain "on" for 100% of each clock cycle. The maximum allowable duty cycle is given by: DCMAX = (TP Min Off Time) * 100% TP Inductor Selection
General Guidelines: The high frequency operation of the LT3580 allows for the use of small surface mount inductors. For high efficiency, choose inductors with high frequency core material, such as ferrite, to reduce core losses. To improve efficiency, choose inductors with more volume for a given inductance. The inductor should have low DCR (copper wire resistance) to reduce I2R losses, and must be able to handle the peak inductor current without saturating. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology, where each inductor only carries a fraction of the total switch current. Molded chokes or chip inductors usually do not have enough core area to support peak inductor currents in the 2A to 3A range. To minimize radiated noise, use a toroidal or shielded inductor. Note that the inductance of shielded types will drop more as current increases, and will saturate more easily. See Table 1 for a list of inductor manufacturers.
Table 1.Inductor Manufacturers
Coilcraft DO3316P, MSS7341 and LPS4018 Series LQH55D and LQH66S Series www.coilcraft.com www.coiltronics.com www.murata.com
where TP is the clock period and Min Off Time (found in the Electrical Characteristics) is typically 60ns. The application should be designed so that the operating duty cycle does not exceed DCMAX. Duty cycle equations for several common topologies are given below, where VD is the diode forward voltage drop and VCESAT is typically 300mV at 1.5A. For the boost topology: VOUT VIN + VD DC VOUT + VD VCESAT For the SEPIC or dual inductor inverting topology (see Figures 1 and 2): VD +| VOUT | DC VIN + | VOUT | + VD VCESAT The LT3580 can be used in configurations where the duty cycle is higher than DCMAX, but it must be operated in the discontinuous conduction mode so that the effective duty cycle is reduced.
Coiltronics DR, LD and CD Series Murata Sumida
CDRH5D18B/HP, CDR6D23MN, www.sumida.com CDRH6D26/HP, CDRH6D28, CDR7D28MN and CDRH105R Series RLF7030 and VLCF4020 Series WE-PD and WE-PD2 Series www.tdk.com www.we-online.com
TDK Wurth
Minimum Inductance: Although there can be a tradeoff with efficiency, it is often desirable to minimize board space by choosing smaller inductors. When choosing an inductor, there are two conditions that limit the minimum inductance; (1) providing adequate load current, and (2) avoidance of subharmonic oscillation. Adequate Load Current: Small value inductors result in increased ripple currents and thus, due to the limited peak switch current, decrease the average current that can be provided to a load (IOUT). In order to provide adequate load current, L should be at least: DC * VIN L> | VOUT | * IOUT 2(f) ILIM VIN *
3580fc
9
LT3580 APPLICATIONS INFORMATION
for boost, coupled inductor SEPIC and coupled inductor inverting topologies, or: L1 L2 > 2(f) ILIM DC * VIN VOUT * IOUT VIN * thus causing duty cycle jitter and/or poor regulation. The maximum inductance can be calculated by: LMAX = IOUT VIN - VCESAT DC * IMIN RIPPLE f
for the uncoupled inductor SEPIC and uncoupled inductor inverting topologies. where: DC = switch duty cycle (see previous section) ILIM = switch current limit, typically about 2.4A at 50% duty cycle (see the Typical Performance Characteristics section). = power conversion efficiency (typically 88% for boost and 75% for dual inductor topologies at high currents). f = switching frequency Negative values of LMIN1 indicate that the output load current IOUT exceeds the switch current limit capability of the LT3580.
where LMAX is L1||L2 for dual inductor topologies and a good choice for IMIN-RIPPLE is 300mA.
Current Rating: Finally, the inductor(s) must have a rating greater than its peak operating current to prevent inductor saturation resulting in efficiency loss. In steady state, the peak input inductor current (continuous conduction mode only) is given by:
IL1
PEAK
=
VOUT *IOUT VIN *
+
VIN * DC 2 * L1* f
for the boost, uncoupled inductor SEPIC and uncoupled inductor inverting topologies, or: IL1
PEAK
| VOUT *IOUT | VIN * DC + VIN * * DC 2 * L1* f
for the coupled inductor SEPIC and coupled inductor inverting topology. For dual inductor topologies, the peak output inductor current is given by: IL2
PEAK
Avoiding Subharmonic Oscillations: The LT3580's internal slope compensation circuit will prevent subharmonic oscillations that can occur when the duty cycle is greater than 50%, provided that the inductance exceeds a minimum value. In applications that operate with duty cycles greater than 50%, the inductance must be at least: V * ( 2 * DC - 1) L > IN (1 DC) * (f) * 0.8
for boost, coupled inductor SEPIC, and coupled inductor inverting topologies, or: V * ( 2 * DC - 1) L1 L2 > IN (1 DC) * (f) * 0.8 for the uncoupled inductor SEPIC and uncoupled inductor inverting topologies.
=IOUT +
VOUT * (1- DC) 2 * L2 * f
for the uncoupled inductor topologies, or IL2
PEAK
* (1- DC) V IOUT + OUT 1- DC 2 * L2 * f
for the coupled inductor topologies Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X5R or X7R dielectrics are preferred, as these materials retain their capacitance over wider voltage
3580fc
Maximum Inductance: Excessive inductance can reduce current ripple to levels that are difficult for the current comparator (A3 in the Block Diagram) to cleanly discriminate,
10
LT3580 APPLICATIONS INFORMATION
and temperature ranges. A 4.7F to 20F output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1F or 2.2F output capacitor. Always use a capacitor with a sufficient voltage rating. Many capacitors rated at 2.2F to 20F, particularly 0805 or 0603 case sizes, have greatly reduced capacitance at the desired output voltage. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR with greater output ripple. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as closely as possible to the LT3580. A 2.2F to 4.7F input capacitor is sufficient for most applications. Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts.
Table 2. Ceramic Capacitor Manufacturers
Kemet Murata Taiyo Yuden www.kemet.com www.murata.com www.t-yuden.com
Compensation--Adjustment To compensate the feedback loop of the LT3580, a series resistor-capacitor network in parallel with a single capacitor should be connected from the VC pin to GND. For most applications, the series capacitor should be in the range of 470pF to 2.2nF with 1nF being a good starting value. The parallel capacitor should range in value from 10pF to 100pF with 47pF a good starting value. The compensation resistor, RC , is usually in the range of 5k to 50k. A good technique to compensate a new application is to use a 100k potentiometer in place of series resistor RC. With the series capacitor and parallel capacitor at 1nF and 47pF respectively, adjust the potentiometer while observing the transient response and the optimum value for RC can be found. Figures 3a to 3c illustrate this process for the circuit of Figure 14 with a load current stepped between 400mA and 500mA. Figure 3a shows the transient response with RC equal to 1k. The phase margin is poor, as evidenced by the excessive ringing in the output voltage and inductor current. In Figure 3b, the value of RC is increased to 3k, which results in a more damped response. Figure 3c shows the results when RC is increased further to 10k. The transient response is nicely damped and the compensation procedure is complete.
VOUT 200mV/DIV AC COUPLED IL 0.5A/DIV
VOUT 200mV/DIV AC COUPLED IL 0.5A/DIV
RC = 1k
200s/DIV
3580 F03a
RC = 3k
200s/DIV
3580 F03b
Figure 3a. Transient Response Shows Excessive Ringing
Figure 3b. Transient Response Is Better
VOUT 200mV/DIV AC COUPLED IL 0.5A/DIV
RC = 10k
200s/DIV
3580 F03c
Figure 3c. Transient Response Is Well Damped
3580fc
11
LT3580 APPLICATIONS INFORMATION
Compensation--Theory Like all other current mode switching regulators, the LT3580 needs to be compensated for stable and efficient operation. Two feedback loops are used in the LT3580-- a fast current loop which does not require compensation, and a slower voltage loop which does. Standard bode plot analysis can be used to understand and adjust the voltage feedback loop. As with any feedback loop, identifying the gain and phase contribution of the various elements in the loop is critical. Figure 4 shows the key equivalent elements of a boost converter. Because of the fast current control loop, the power stage of the IC, inductor and diode have been replaced by the equivalent transconductance amplifier gmp. gmp acts as a current source where the output current is proportional to the VC voltage.
-
From Figure 4, the DC gain, poles and zeros can be calculated as follows: Output Pole: P1= 2 2 * * RL * COUT 1 2 * * RO * CC 1 2 * * RC * CC 1 4
Error Amp Pole: P2 = Error Amp Zero: Z1= DC Gain: A= VREF VOUT
2
* VIN * gma * RO * gmp * RL * 1 2 * * RESR * COUT VIN2 * RL 2 * * VOUT 2 * L fS 3
ESR Zero: Z2 =
RHP Zero: Z3 =
gmp VOUT CPL RESR COUT R1 RL
VC RC CC RO
CC: COMPENSATION CAPACITOR COUT: OUTPUT CAPACITOR CPL: PHASE LEAD CAPACITOR gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER RC: COMPENSATION RESISTOR RL: OUTPUT RESISTANCE DEFINED AS VOUT DIVIDED BY ILOAD(MAX) RO: OUTPUT RESISTANCE OF gma R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK RESR: OUTPUT CAPACITOR ESR
Figure 4. Boost Converter Equivalent Model
Note that the maximum output currents of gmp and gma are finite. The limits for gmp are in the Electrical Characteristics section (switch current limit), and gma is nominally limited to about 12A.
12
+ +
gma
1.215V REFERENCE
High Frequency Pole: P3 > Phase Lead Zero: Z4 = Phase Lead Pole: P4 =
-
R2
3580 F04
1 2 * * R1* CPL 1 2 * * CPL * R1* R2 R1+R2
The current mode zero (Z3) is a right-half plane zero which can be an issue in feedback control design, but is manageable with proper external component selection.
3580fc
LT3580 APPLICATIONS INFORMATION
Using the circuit in Figure 14 as an example, Table 3 shows the parameters used to generate the bode plot shown in Figure 5. Note that R2 is 14.6k ||14.6k = 7.3k which is the effective small signal resistance looking into the FB pin of the LT3580.
Table 3. Bode Plot Parameters
PARAMETER RL COUT RESR RO CC CPL RC R1 R2 VREF VOUT VIN gma gmp L fS VALUE 21.8 10 10 305 1000 0 10 130 7.3 1.215 12 5 230 7 4.2 1.2 UNITS F m k pF pF k k k V V V mho mho H MHz COMMENT Application Specific Application Specific Application Specific Not Adjustable Adjustable Optional/Adjustable Adjustable Adjustable Not Adjustable Not Adjustable Application Specific Application Specific Not Adjustable Not Adjustable Application Specific Adjustable
Diode Selection Schottky diodes, with their low forward voltage drops and fast switching speeds, are recommended for use with the LT3580. The Microsemi UPS120 is a very good choice. Where the input-to-output voltage differential exceeds 20V, use the UPS140 (a 40V diode). These diodes are rated to handle an average forward current of 1A. Oscillator The operating frequency of the LT3580 can be set by the internal free-running oscillator. When the SYNC pin is driven low (< 0.4V), the frequency of operation is set by a resistor from RT to ground. An internally trimmed timing capacitor resides inside the IC. The oscillator frequency is calculated using the following formula: fOSC = 91.9 (R T + 1)
where fOSC is in MHz and RT is in k. Conversely, RT (in k) can be calculated from the desired frequency (in MHz) using: RT = 91.9 1 fOSC
In Figure 5, the phase is -140 when the gain reaches 0dB giving a phase margin of 40. The crossover frequency is 10kHz, which is more than three times lower than the frequency of the RHP zero to achieve adequate phase margin.
180 160 140 120 GAIN (dB) 100 80 60 40 20 0 -20 10 100 1k 10k FREQUENCY (Hz) 100k 1M
3580 F05
Clock Synchronization The operating frequency of the LT3580 can be synchronized to an external clock source. To synchronize to the external source, simply provide a digital clock signal into the SYNC pin. The LT3580 will operate at the SYNC clock frequency. The LT3580 will revert to the internal free-running oscillator clock after SYNC is driven low for a few free-running clock periods. Driving SYNC high for an extended period of time effectively stops the operating clock and prevents latch SR1 from becoming set (see the Block Diagram). As a result, the switching operation of the LT3580 will stop. The duty cycle of the SYNC signal must be between 35% and 65% for proper operation. Also, the frequency of the SYNC signal must meet the following two criteria:
0 -20 -40 PHASE -60 PHASE (DEG) -80 -100 40 AT 10kHz GAIN -120 -140 -160 -180 -200
Figure 5. Bode Plot for Example Boost Converter
3580fc
13
LT3580 APPLICATIONS INFORMATION
(1) SYNC may not toggle outside the frequency range of 200kHz to 2.5MHz unless it is stopped low to enable the free-running oscillator. (2) The SYNC frequency can always be higher than the free-running oscillator frequency, fOSC , but should not be less than 25% below fOSC . Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is staying clear of sensitive frequency bands, which cannot tolerate any spectral noise. For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz, and in that case, a 1.5MHz switching converter frequency may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The tradeoff is efficiency, since the switching losses due to NPN base charge (see Thermal Calculations), Schottky diode charge, and other capacitive loss terms increase proportionally with frequency. Soft-Start The LT3580 contains a soft-start circuit to limit peak switch currents during start-up. High start-up current is inherent in switching regulators in general since the feedback loop is saturated due to VOUT being far from its final value. The regulator tries to charge the output capacitor as quickly as possible, which results in large peak currents. The start-up current can be limited by connecting an external capacitor (typically 100nF to 1F) to the SS pin. This capacitor is slowly charged to ~2.2V by an internal 275k resistor once the part is activated. SS pin voltages below ~1.1V reduce the internal current limit. Thus, the gradual ramping of the SS voltage also gradually increases the current limit as the capacitor charges. This, in turn, allows the output capacitor to charge gradually toward its final value while limiting the start-up current. In the event of a commanded shutdown or lockout (SHDN pin), internal undervoltage lockout (UVLO) or a thermal lockout, the soft-start capacitor is automatically discharged to ~200mV before charging resumes, thus assuring that the soft-start occurs after every reactivation of the chip. Shutdown The SHDN pin is used to enable or disable the chip. For most applications, SHDN can be driven by a digital logic source. Voltages above 1.38V enable normal active operation. Voltages below 300mV will shutdown the chip, resulting in extremely low quiescent current. While the SHDN voltage transitions through the lockout voltage range (0.3V to 1.24V) the power switch is disabled and the SR2 latch is set (see the Block Diagram). This causes the soft-start capacitor to begin discharging, which continues until the capacitor is discharged and active operation is enabled. Although the power switch is disabled, SHDN voltages in the lockout range do not necessarily reduce quiescent current until the SHDN voltage is near or below the shutdown threshold. Also note that SHDN can be driven above VIN or VOUT as long as the SHDN voltage is limited to less than 32V.
ACTIVE (NORMAL OPERATION) 1.38V 1.24V SHDN (V) (HYSTERESIS AND TOLERANCE)
LOCKOUT (POWER SWITCH OFF , SS CAPACITOR DISCHARGED)
0.3V 0.0V
SHUTDOWN (LOW QUIESCENT CURRENT)
3580 F06
Figure 6. Chip States vs SHDN Voltage
Configurable Undervoltage Lockout Figure 7 shows how to configure an undervoltage lockout (UVLO) for the LT3580. Typically, UVLO is used in situations where the input supply is current-limited, has a relatively high source resistance, or ramps up/down slowly. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current-limit or latch low under low source voltage conditions. UVLO prevents
3580fc
14
LT3580 APPLICATIONS INFORMATION
VIN RUVLO1 SHDN RUVLO2
(OPTIONAL)
VIN 1.3V
- +
ACTIVE/ LOCKOUT
To activate the LT3580 for VIN voltage greater than 4.5V using the double resistor configuration, choose RUVLO2 = 10k and: RUVLO1 = 4.5V 1.32V = 22.1k 1.32V + 11.6A 10k
11.6A AT 1.3V GND
3580 F07
Internal Undervoltage Lockout The LT3580 monitors the VIN supply voltage in case VIN drops below a minimum operating level (typically about 2.3V). When VIN is detected low, the power switch is deactivated, and while sufficient VIN voltage persists, the soft-start capacitor is discharged. After VIN is detected high, the power switch will be reactivated and the softstart capacitor will begin charging. Thermal Considerations For the LT3580 to deliver its full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This is accomplished by taking advantage of the thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. Thermal Lockout
Figure 7. Configurable UVLO
the regulator from operating at source voltages where these problems might occur. The shutdown pin comparator has voltage hysteresis with typical thresholds of 1.32V (rising) and 1.29V (falling). Resistor RUVLO2 is optional. RUVLO2 can be included to reduce the overall UVLO voltage variation caused by variations in SHDN pin current (see the Electrical Characteristics). A good choice for RUVLO2 is 10k 1%. After choosing a value for RUVLO2, RUVLO1 can be determined from either of the following: RUVLO1 = VIN + 1.32V 1.32V + 11.6A RUVLO2 VIN 1.29V
or RUVLO1 = 1.29V + 11.6A RUVLO2
where VIN+ and VIN - are the VIN voltages when rising or falling respectively. For example, to disable the LT3580 for VIN voltages below 3.5V using the single resistor configuration, choose: RUVLO1 = 3.5V 1.29V = 190.5k 1.29V + 11.6A
If the die temperature reaches approximately 165C, the part will go into thermal lockout, the power switch will be turned off and the soft-start capacitor will be discharged. The part will be enabled again when the die temperature has dropped by ~5C (nominal). Thermal Calculations Power dissipation in the LT3580 chip comes from four primary sources: switch I2R loss, NPN base drive (AC), NPN base drive (DC), and additional input current. The following formulas can be used to approximate the power losses. These formulas assume continuous mode opera-
3580fc
15
LT3580 APPLICATIONS INFORMATION
tion, so they should not be used for calculating efficiency in discontinuous mode or at light load currents. V *I Average Switch Current: ISW = OUT OUT VIN * Switch I2R Loss: PSW = (DC)(ISW )2(RSW ) Base Drive Loss (AC): PBAC = 13n(ISW )(VOUT )(f) Base Drive Loss (DC): PBDC = (VIN )(ISW )(DC) 50 VIN Ramp Rate While initially powering a switching converter application, the VIN ramp rate should be limited. High VIN ramp rates can cause excessive inrush currents in the passive components of the converter. This can lead to current and/or voltage overstress and may damage the passive components or the chip. Ramp rates less than 500mV/s, depending on component parameters, will generally prevent these issues. Also, be careful to avoid hotplugging. Hotplugging occurs when an active voltage supply is "instantly" connected or switched to the input of the converter. Hotplugging results in very fast input ramp rates and is not recommended. Finally, for more information, refer to Linear application note AN88, which discusses voltage overstress that can occur when an inductive source impedance is hotplugged to an input pin bypassed by ceramic capacitors. Layout Hints As with all high frequency switchers, when considering layout, care must be taken to achieve optimal electrical, thermal and noise performance. One will not get advertised performance with a careless layout. For maximum efficiency, switch rise and fall times are typically in the 5ns to 10ns range. To prevent noise, both radiated and conducted, the high speed switching current path, shown in Figure 8, must be kept as short as possible. This is implemented in the suggested layout of a boost configuration in Figure 9. Shortening this path will also reduce the parasitic trace inductance. At switch-off, this parasitic inductance produces a flyback spike across the LT3580 switch. When operating at higher currents and output voltages, with poor layout, this spike can generate voltages across the LT3580 that may exceed its absolute maximum rating. A ground plane should also be used under the switcher circuitry to prevent interplane coupling and overall noise. The VC and FB components should be kept as far away as practical from the switch node. The ground for these components should be separated from the switch current path. Failure to do so can result in poor stability or subharmonic oscillation.
Input Power Loss: PINP = 7mA(VIN ) where: RSW = switch resistance (typically 200m at 1.5A) DC = duty cycle (see the Power Switch Duty Cycle section for formulas) = power conversion efficiency (typically 88% at high currents) Example: boost configuration, VIN = 5V, VOUT = 12V, IOUT = 0.5A, f = 1.25MHz, VD = 0.5V: ISW = 1.36A DC = 61.5% PSW = 228mW PBAC = 270mW PBDC = 84mW PINP = 35mW Total LT3580 power dissipation (PTOT) = 617mW Thermal resistance for the LT3580 is influenced by the presence of internal, topside or backside planes. To calculate die temperature, use the appropriate thermal resistance number and add in worst-case ambient temperature: TJ = TA + JA * PTOT where TJ = junction temperature, TA = ambient temperature, JA = 43C/W for the 3mm x 3mm DFN package and 35C/W to 40C/W for the MSOP Exposed Pad package. PTOT is calculated above.
3580fc
16
LT3580 APPLICATIONS INFORMATION
Board layout also has a significant effect on thermal resistance. The exposed package ground pad is the copper plate that runs under the LT3580 die. This is a good thermal path for heat out of the package. Soldering the pad onto the board reduces die temperature and increases the power capability of the LT3580. Provide as much copper area as possible around this pad. Adding multiple feedthroughs around the pad to the ground plane will also help. Figures 9 and 10 show the recommended component placement for the boost and SEPIC configurations, respectively. Layout Hints for Inverting Topology Figure 11 shows recommended component placement for the dual inductor inverting topology. Input bypass capacitor, C1, should be placed close to the LT3580, as shown. The load should connect directly to the output capacitor, C2, for best load regulation. You can tie the local ground into the system ground plane at the C3 ground terminal. The cut ground copper at D1's cathode is essential to obtain low noise. This important layout issue arises due to the chopped nature of the currents flowing in Q1 and D1. If they are both tied directly to the ground plane before being combined, switching noise will be introduced into the ground plane. It is almost impossible to get rid of this noise, once present in the ground plane. The solution is to tie D1's cathode to the ground pin of the LT3580 before the combined currents are dumped in the ground plane as drawn in Figure 2, Figure 12 and Figure 13. This single layout technique can virtually eliminate high frequency "spike" noise, so often present on switching regulator outputs.
L1 C1 D1 VOUT SW LT3580 VIN GND HIGH FREQUENCY SWITCHING PATH
C2 LOAD
3580 F08
Figure 8. High Speed "Chopped" Switching Path for Boost Topology
3580fc
17
LT3580 APPLICATIONS INFORMATION
GND GND
1 1
C1 VIN L1 SW L2 D1 C2 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE
3580 F09
8 9 7 6 5
SYNC
8 9 7 6 5
SYNC VIN
C1
2 3 4
L1
2 3 4
SHDN
SHDN
SW
C2
D1
C3
VOUT VOUT
3580 F10
VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE
Figure 9. Suggested Component Placement for Boost Topology (Both DFN and MSOP Packages. Not to Scale). Pin 9 (Exposed Pad) must be soldered directly to the local ground plane for adequate thermal performance. Multiple vias to additional ground planes will improve thermal performance.
Figure 10. Suggested Component Placement for SEPIC Topology (Both DFN and MSOP Packages. Not to Scale). Pin 9 (Exposed Pad) must be soldered directly to the local ground plane for adequate thermal performance. Multiple vias to additional ground planes will improve thermal performance.
GND
1
C1 VIN
8 9 7 6 5
SYNC
2 3 4
L1 SW
SHDN
L2
C2 D1 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE
3580 F11
C3
VOUT
Figure 11. Suggested Component Placement for Inverting Topology (Both DFN and MSOP Packages. Not to Scale). Note cut in ground copper at diode's cathode. Pin 9 (Exposed Pad) must be soldered directly to local ground plane for adequate thermal performance. Multiple vias to additional ground planes will improve thermal performance.
3580fc
18
LT3580 APPLICATIONS INFORMATION
VCESAT L1 VIN SW -(VIN + VOUT) C2 SWX L2 -VOUT
+
C1
Q1
D1 C3 RLOAD
Figure 12. Switch-On Phase of an Inverting Converter. L1 and L2 Have Positive dI/dt.
VIN + VOUT+ VD L1 VIN SW C2 VD SWX L2 -VOUT
+
C1
Q1
D1 C3 RLOAD
Figure 13. Switch-Off Phase of an Inverting Converter. L1 and L2 Currents Have Negative dI/dt.
VIN 5V VIN SHDN RT
L1 4.2H
D1 C2 10F 130k FB VC SS 0.1F 10k 1nF
3580 F14
VOUT 12V 550mA
SW GND LT3580
SYNC C1 2.2F 75k
C1: 2.2F 25V, X5R, 1206 , C2: 10F 25V, X5R, 1206 , D1: MICROSEMI UPS120 L1: SUMIDA CDR6D23MN-4R2
Figure 14. 1.2MHz, 5V to 12V Boost Converter
3580fc
+
+
3580 F12
3580 F13
19
LT3580 TYPICAL APPLICATIONS
750kHz, 5V to 40V, 150mA Boost Converter
L1 47H
D1 C2 2.2F 464k FB VC SS 0.1F 10k 4.7nF
3580 TA02
VIN 5V VIN SHDN RT
VOUT 40V 150mA
SW GND LT3580
SYNC C1 2.2F 121k
47pF
C1, C2: 2.2F 25V, X5R, 1206 , D1: MICROSEMI UPS140 L1: SUMIDA CDRH105R-470
Wide Input Range SEPIC Converter with 5V Output Switches at 2.5MHz
L1 4.7H C3 1F
VIN 2.6V TO 12V OPERATING 12V TO 32V TRANSIENT
D1 VOUT 5V, 600mA (VIN = 5V OR HIGHER) 500mA (VIN = 4V) C2 400mA (VIN = 3V) 10F 300mA (VIN = 2.6V)
VIN SHDN RT LT3580
SW GND 46.4k FB VC SS 0.1F
L2 4.7H
SYNC C1 2.2F 35.7k
10k 1nF
22pF
3580 TA03a
C1: 2.2F 35V, X5R, 1206 , C2: 10F 10V, X5R, 1206 , C3: 1F 50V, X5R, 0805 , D1: MICROSEMI UPS140 L1, L2: TDK VLCF4020T-4R7N1R2
Transient Response with 400mA to 500mA Output Load Step
VOUT 100mV/DIV AC COUPLED
IL1 +IL2 0.5A/DIV
VIN = 12V
100s/DIV
3580 TA03b
3580fc
20
LT3580 TYPICAL APPLICATIONS
VFD (Vacuum Flourescent Display) Power Supply Switches at 2MHz to Avoid AM Band Danger High Voltage! Operation by High Voltage Trained Personnel Only
D1 R2 10 L1 10H 3.3V VIN SHDN C1 4.7F RT C2 4.7F 45.3k SYNC SS 0.1F LT3580 GND FB VC 10k 2.2nF
3580 TA04
D2 D3 D4
C5 1F
VOUT2 95V 80mA
C7 1F R1 10 SW C6 1F
VIN 9V TO 16V
C4 1F
VOUT1 64V 40mA
D5 C3 1F
383k
47pF
C1, C2: 4.7F 25V, X5R, 1206 , C3-C7: 1F 50V, X5R, 0805 , D1-D4: ON SEMICONDUCTOR MBR0540 D5: MICROSEMI UPS140 L1: SUMIDA CDR6D28MNNP-100 R1, R2: 0.5W
3580fc
21
LT3580 TYPICAL APPLICATIONS
High Voltage Positive Power Supply Uses Tiny 5.8mm x 5.8mm x 3mm Transformer and Switches at 200kHz Danger High Voltage! Operation by High Voltage Trained Personnel Only
T1 1:10.4 7, 8 4.7H 5, 6 VOUT 350V 4.5mA (VIN = 5V) 2.5mA (VIN = 3.3V)
VIN 3.3V TO 5V
* *
1 D1 4 C2 68nF
D2
VIN SHDN RT LT3580
SW GND RFB 4.22M* FB VC SS 0.47F 10k 10nF
3580 TA05a
FOR ANY VOUT BETWEEN 50V TO 350V, CHOOSE RFB ACCORDING TO V - 1.215 RFB = OUT 83.3A FOR 5V INPUT, KEEP MAXIMUM OUTPUT POWER AT 1.58W FOR 3.3V INPUT, KEEP MAXIMUM OUTPUT POWER AT 0.88W *MAY REQUIRE MULTIPLE SERIES RESISTORS TO COMPLY WITH MAXIMUM VOLTAGE RATINGS
SYNC C1 2.2F 464k
100pF
C1: 2.2F 25V, X5R, 1206 , C2: TDK C3225X7R2J683M D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES D2: ON SEMICONDUCTOR MBR0540 T1: TDK LDT565630T-041
Start-Up Waveforms
IPRIMARY 1A/DIV
VOUT 50V/DIV 5V INPUT NO LOAD 2ms/DIV
3580 TA05b
Switching Waveforms
VOUT 2V/DIV AC COUPLED
IPRIMARY 1A/DIV 5V INPUT 4.5mA LOAD 2s/DIV
3580 TA05c
3580fc
22
LT3580 TYPICAL APPLICATIONS
High Voltage Negative Power Supply Uses Tiny 5.8mm x 5.8mm x 3mm Transformer and Switches at 200kHz Danger High Voltage! Operation by High Voltage Trained Personnel Only
T1 1:10.4 7, 8 4.7H 5, 6 D1 1
VIN 3.3V TO 5V
* *
4
C2 68nF FOR ANY VOUT BETWEEN -50V TO -350V, CHOOSE RFB ACCORDING TO
D2 VIN SHDN RT LT3580 SW GND RFB 4.22M* FB VC SYNC C1 2.2F 464k SS 0.47F 10k 10nF
3580 TA06
RFB =
VOUT 83.3A
VOUT -350V 4.5mA (VIN = 5V) 2.5mA (VIN = 3.3V) 100pF
FOR 5V INPUT, KEEP MAXIMUM OUTPUT POWER AT 1.58W FOR 3.3V INPUT, KEEP MAXIMUM OUTPUT POWER AT 0.88W *MAY REQUIRE MULTIPLE SERIES RESISTORS TO COMPLY WITH MAXIMUM VOLTAGE RATINGS
C1: 2.2F 25V, X5R, 1206 , C2: TDK C3225X7R2J683M D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES D2: ON SEMICONDUCTOR MBR0540 T1: TDK LDT565630T-041
3580fc
23
LT3580 TYPICAL APPLICATIONS
5V to 12V Boost Converter Switches at 2.5MHz and Uses a Tiny 4mm x 4mm x 1.7mm Inductor
L1 3.3H D1 C2 4.7F 130k FB VC SYNC C1 4.7F 35.7k SS 0.1F 10k 2.2nF
3580 TA07a
VIN 5V VIN SHDN RT
VOUT 12V 500mA
SW GND LT3580
47pF
C1, C2: 4.7F 25V, X5R, 1206 , D1: MICROSEMI UPS120 L1: COILCRAFT LPS4018-332ML
Efficiency and Power Loss vs Load Current
95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 0 100 200 300 400 LOAD CURRENT (mA) 500 200 0 600 1000 800 600 400 POWER LOSS (W) 1400 1200
3580 TA07b
Transient Response with 400mA to 500mA to 400mA Output Load Step
VOUT 5V/DIV
Start-Up Waveforms
VOUT 0.5V/DIV AC COUPLED IL 0.5A/DIV
IL 1A/DIV
VSHDN 1V/DIV 100s/DIV
3580 TA07c
500mA LOAD
2ms/DIV
3580 TA07d
3580fc
24
LT3580 TYPICAL APPLICATIONS
-5V Output Inverting Converter Switches at 2.5MHz and Accepts Inputs Between 3.3V to 12V
L1 4.7H C3 1F L2 4.7H
VIN 3.3V TO 12V VIN SHDN RT
SW GND LT3580
D1
VOUT -5V 800mA (VIN = 12V) C2 620mA (VIN = 5V) 10F 450mA (VIN = 3.3V)
60.2k FB VC SS 0.1F 10k 100pF 2.2nF
3580 TA08a
SYNC C1 2.2F 35.7k
C1: 2.2F 25V, X5R, 1206 , C2: 10F 25V, X5R, 1206 , C3: 1F 50V, X5R, 0805 , D1: CENTRAL SEMI CMMSH1-40 L1, L2: COILCRAFT LSP4018-472ML
Efficiency and Power Loss vs Load Current
85 80 75 POWER LOSS (W) EFFICIENCY (%) 70 65 600 60 55 50 200 45 40 0 100 200 300 400 500 LOAD CURRENT (mA) 600 0 700 400 800 VIN = 5V 1200 1000
3580 TA08b
3580fc
25
LT3580 PACKAGE DESCRIPTION
DD Package 8-Lead Plastic DFN (3mm x 3mm) (Reference LTC DWG # 05-08-1698)
0.675 0.05
3.5 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 0.38 0.10 8
3.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6)
1.65 0.10 (2 SIDES)
(DD) DFN 1203
0.200 REF
0.75 0.05
4 0.25 0.05 2.38 0.10 (2 SIDES)
1 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE
3580fc
26
LT3580 PACKAGE DESCRIPTION
MS8E Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1662)
BOTTOM VIEW OF EXPOSED PAD OPTION 1 2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004)
2.794 0.102 (.110 .004)
0.889 0.127 (.035 .005)
5.23 (.206) MIN
2.083 0.102 3.20 - 3.45 (.082 .004) (.126 - .136) 8
0.42 0.038 (.0165 .0015) TYP
0.65 (.0256) BSC
3.00 0.102 (.118 .004) (NOTE 3)
8
7 65
0.52 (.0205) REF
RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4)
0.254 (.010) GAUGE PLANE
1 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 1.10 (.043) MAX
23
4 0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.65 (.0256) BSC
0.1016 0.0508 (.004 .002)
MSOP (MS8E) 0307 REV D
3580fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3580 TYPICAL APPLICATION
2MHz Inverting Converter Generates -12V from a 5V to 12V Input
L1 10H C3 1F L2 22H 90 VOUT -12V 500mA (VIN = 12V) 350mA (VIN = 5V) 85 80 EFFICIENCY (%) 75 800 70 600 65 60 55
3580 TA09a
Efficiency and Power Loss vs Load Current
VIN = 5V 1400 1200 1000 POWER LOSS (mw)
VIN 5V TO 12V VIN SHDN RT
SW GND LT3580
D1
C2 10F
147k FB VC SS 0.1F 10k 2.2nF 47pF
SYNC C1 2.2F 45.3k
400 200 0 100 150 200 250 300 350 400 LOAD CURRENT (mA)
3580 TA09b
C1: 2.2F 25V, X5R, 1206 , C2: 10F 25V, X5R, 1206 , C3: 1F 50V, X5R, 0805 , D1: CENTRAL SEMI CMMSH1-40 L1: SUMIDA CDRH6D28NP-100NC L2: SUMIDA CDRH3D28NP-220NC
50
0
50
RELATED PARTS
PART NUMBER LT1310 LT1613 LT1618 LT1930/LT1930A DESCRIPTION 2A (ISW ), 40V, 1.2MHz High Efficiency Step-Up DC/DC Converter 550mA (ISW ), 1.4MHz High Efficiency Step-Up DC/DC Converter 1.5A (ISW ), 1.25MHz High Efficiency Step-Up DC/DC Converter 1A (ISW ), 1.2MHz/2.2MHz High Efficiency Step-Up DC/DC Converter 1A (ISW ), 1.2MHz/2.2MHz High Efficiency Inverting DC/DC Converter 2A (ISW ), 40V, 1.2MHz High Efficiency Step-Up DC/DC Converter Dual Output 350mA (ISW ), Constant Off-Time, High Efficiency Step-Up DC/DC Converter Dual Output Pos/Neg 350mA (ISW ), Constant Off-Time, High Efficiency Step-Up DC/DC Converter 1.5A (ISW ), 1.2MHz/2.7MHz High Efficiency Step-Up DC/DC Converter 1.5A (ISW ), 1.25MHz High Efficiency Step-Up DC/DC Converter 3A (ISW ), 800kHz, 34V Step-Up DC/DC Converter 1.1A (ISW ), 1.3MHz High Efficiency Step-Up DC/DC Converter 42V, 3A, 3.5MHz Boost, Buck-Boost, Buck LED Driver 3A Full-Featured DC/DC Converter with Soft-Start and Inrush Current Protection COMMENTS VIN: 2.3V to 16V, VOUT(MAX) = 40V, IQ = 3mA, ISD < 1A, ThinSOTTM Package VIN: 0.9V to 10V, VOUT(MAX) = 34V, IQ = 3mA, ISD < 1A, ThinSOT Package VIN: 1.6V to 18V, VOUT(MAX) = 35V, IQ = 1.8mA, ISD < 1A, MS10 Package VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package VIN: 2.3V to 16V, VOUT(MAX) = 40V, IQ = 3mA, ISD < 1A, ThinSOT Package VIN: 1.2V to 15V, VOUT(MAX) = 34V, IQ = 20A, ISD < 1A, MS10 Package VIN: 1.2V to 15V, VOUT(MAX) = 34V, IQ = 20A, ISD < 1A, MS10 Package VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 3.2mA, ISD < 1A, MS8E Package VIN: 3V to 25V, VOUT(MAX) = 35V, IQ = 0.9mA, ISD < 6A, MS8E Package VIN: 3V to 25V, VOUT(MAX) = 34V, IQ = 0.9mA, ISD < 6A, TSSOP16E Package VIN: 2.6V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1A, ThinSOT, 2mm x 3mm DFN Packages VIN: 2.5V to 25V, VOUT(MAX) = 40V, Analog/PWM, ISD < 1A, QFN, TSSOP20E Packages VIN: 2.5V to 24V, VOUT(MAX) = 40V, Analog/PWM, ISD < 1A, DFN, TSSOP Packages
3580fc LT 0508 REV C * PRINTED IN USA
LT1931/LT1931A
LT1935 LT1944/LT1944-1 (Dual) LT1945 (Dual) LT1946/LT1946A LT1961 LT3436 LT3467 LT3477 LT3479
28 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

▲Up To Search▲

Price & Availability of LT3580

	To Download LT3580 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .